A new approach to an analog ultra-low power visionchip design is presented. The prototype chip performs low-levelconvolutional image processing algorithms in real time. Thecircuit is implemented in 0.35 μm CMOS technology, contains64 x 64 SIMD matrix with embedded analogue processors APE(Analogue Processing Element). The photo-sensitive-matrix is of2.2 μm x 2.2 μm size, giving the density of 877 processors permm2. The matrix dissipates less than 0.4 mW (less than 0.1 μWper processor) of power under 3.3 V supply, and their imageprocessing speed is up to 100 frames/s.
Authors
Additional information
- DOI
- Digital Object Identifier link open in new tab 10.1109/ecctd.2011.6043651
- Category
- Aktywność konferencyjna
- Type
- publikacja w wydawnictwie zbiorowym recenzowanym (także w materiałach konferencyjnych)
- Language
- angielski
- Publication year
- 2011
