This paper presents local shielding techniques applied to a half-bridge inverter leg with the aim to reduce the common mode (CM) current noise at converter’s DC input. The research study is conducted for 650V Enhancement mode Gallium Nitride (GaN) power transistor switches. Main contributors of parasitic capacitances referred to the inverter-leg middle point node are identified. Then, shielding solutions are proposed to reduce CM current emission by these capacitances. Respecting the precautions concerning the isolation of CM currents of the half-bridge inverter leg, the electromagnetic compatibility measurement setup is developed. Experimental step-by-step addition of local shielding copper layers to different contributors of middle point capacitance shows progressive attenuation of CM noise spectra.
Authors
- Paweł Derkacz link open in new tab ,
- prof Jean-Luc Schanen,
- dr Pierre-Olivier Jeannin,
- prof. dr hab. inż. Piotr Chrzan link open in new tab ,
- dr hab. inż. Piotr Musznicki link open in new tab ,
- dr Mickael Petit
Additional information
- DOI
- Digital Object Identifier link open in new tab 10.1109/tpel.2022.3176943
- Category
- Publikacja w czasopiśmie
- Type
- artykuły w czasopismach
- Language
- angielski
- Publication year
- 2022
