Repozytorium publikacji - Politechnika Gdańska

An analogue median filter, realised in a 0.35 μm CMOS technology, is presented in this paper. The key advantages of the filter are: high speed of image processing (50 frames per second), low-power operation (below 1.25 mW under 3.3 V supply) and relatively high accuracy of signal processing. The presented filter is a part of an integrated circuit for image processing (a vision chip), containing: a photo-sensor matrix, a set of analogue pre-processors, and interface circuits. The analysis of the main parameters of the considered median filter is presented. The discussion of important limitations in the operation of the filter due to the restrictions imposed by CMOS technology is also presented.

Autorzy

• dr hab. inż. Waldemar Jendernalik link otwiera się w nowej karcie ,
• dr hab. inż. Jacek Jakusz link otwiera się w nowej karcie ,
• dr hab. inż. Grzegorz Blakiewicz link otwiera się w nowej karcie ,
• prof. dr hab. inż. Stanisław Szczepański link otwiera się w nowej karcie