Repozytorium publikacji - Politechnika Gdańska

In this paper, an algorithmic framework for cost-efficient design optimization of miniaturized impedance matching transformers has been presented. Our approach exploits a bottom-up design that involves translating the overall design specifications for the circuit at hand to its elementary building blocks (here, compact microstrip resonant cells, CMRCs), as well as fast surrogate-assisted optimization of the cells followed by simulation-based tuning of the entire transformer structure. The last stage involves local response surface approximation models and space mapping for model correction. The proposed technique is illustrated using two wideband transformers, a three- and a four-section one. In both cases, the optimization cost corresponds to just a few dozen of full-wave simulations of the respective structures despite a relatively large number of geometry parameters to be adjusted.

Autorzy

• dr hab. inż. Adrian Bekasiewicz link otwiera się w nowej karcie ,
• prof. dr inż. Sławomir Kozieł link otwiera się w nowej karcie