Repozytorium publikacji - Politechnika Gdańska

The paper presents pixel receivers for massively parallel transmission of video signal between capacitive coupled integrated circuits (ICs). The receivers meet the key requirements for massively parallel transmission, namely low-power consumption below a single μW, small area of less than 205 μm2, high sensitivity better than 160 mV, and good immunity to crosstalk. The receivers were implemented and measured in a 3-D IC (two face-to-face stacked chips fabricated in CMOS 180 nm process). The maximum throughput of 20 Mbps of single receiver has been achieved using a return-to-zero (RZ) code. The static and dynamic power consumption of the single receiver are below 0.2 μW and 0.3 μW/MHz, respectively. The design approach for cost-effective inter-chip massively parallel transmission of photosensor signals with pulse position modulation (PPM) has been also performed. With this approach and the developed receivers it is possible to transfer between chips 9-10 bit images at a speed of over 1k fps.

Autorzy

• dr hab. inż. Grzegorz Blakiewicz link otwiera się w nowej karcie ,
• dr inż. Miron Kłosowski link otwiera się w nowej karcie ,
• dr hab. inż. Waldemar Jendernalik link otwiera się w nowej karcie ,
• dr hab. inż. Jacek Jakusz link otwiera się w nowej karcie ,
• prof. dr hab. inż. Stanisław Szczepański link otwiera się w nowej karcie