Repozytorium publikacji - Politechnika Gdańska

This paper presents a fast direct Pulse Width Modulation (PWM) algorithm for the Conventional Matrix Converters (CMC) developed in Verilog Hardware Description language (HDL). All PWM duty cycle calculations are performed in one cycle by an atomic operation designed as a digital module using FPGA basic blocks. The algorithm can be extended to any number of output phase. The improved version of the discontinuous Direct Analytic Voltage PWM (DAV–PWM) method is proposed, in which the use of trigonometry, angles and program loops has been eliminated. The proposed DAV-PWM is equivalent to the Space Vector Modulation (SVM), it can be applied during input asymmetry and also allows for the control of the displacement input angle. The proposal has been verified using the circuit simulation in PSIM, digital structure modelling in ModelSim, and finally through an experiment.

Autorzy

• dr hab. inż. Paweł Szczepankowski link otwiera się w nowej karcie ,
• dr inż. Wojciech Śleszyński link otwiera się w nowej karcie ,
• Tomasz Bajdecki